Elements of an electronic circuit are integrated into the surface of a wafer (made of a semiconductor material such as silicon) by a series of well-known photographic and chemical processes. The resulting monolithic integrated circuit (IC for short) is a very tiny, yet functional, electronic circuit. As ICs have been made smaller, faster, and more complex, problems that, for early generations of ICs, were considered insignificant, have become major impediments to further increases in IC performance.
A monolithic integrated circuit typically contains a multitude of electrical devices and numerous lines interconnecting those devices. In such a circuit, a dielectric layer such as silicon dioxide or silicon nitride effectively isolates a DC signal line from the substrate. However, pulsating DC and AC signals are much more common than DC signals in integrated circuits. If a line carries a fluctuating signal, whether it be an alternating current signal, such as a clock signal, or pulsating direct current, the signal will, to some extent, be capacitively coupled as unwanted noise into the substrate. In certain circuits such as microprocessor circuits, four or more different AC clock signal lines and a multitude of other lines carrying fluctuating signals may be routed to various devices throughout the entire circuit. Additionally, when driver output impedances are closely matched with device input impedances, high current flow through clock signal lines is a given. This fact, coupled with increasing processor cycle frequencies (frequencies of 40 MHz and above have been announced), provides ample opportunity for noise generation if signal lines are not adequately isolated from the rest of the circuit. This noise will likely be carried by the substrate into nearby circuitry, often with unpredictable results, causing circuit malfunctions such as mistriggering. The higher the clock signal, the greater the potential for introduction of noise into the substrate. Noise problems tend to be extremely difficult to pinpoint, and even more difficult to solve.
In the graphic statement of the problem of FIG. 1, three signal lines 11, 12 and 13 are shown in a simplified circuit example. The signal lines, are insulated from a P-type substrate 14 by a dielectric layer 15. A single transistor N-channel transistor 16 having a multi-layer gate electrode 17 and a silicon dioxide gate dielectric layer 18, is located at the edge of silicon dioxide field isolation dielectric layer 15. It is well known in the art of semiconductor manufacture that silicon dioxide gate dielectric layers generally have thicknesses ranging from 50 to 200 .ANG., whereas silicon dioxide field isolation dielectric layers are typically at least an order of magnitude (i.e., ten times) thickner than the gate dielectric layers. As an AC or pulsating DC signal in line 12, for example, rapidly varies in voltage, the signal will, to some extent, be capacitively coupled into substrate 14 as an unwanted noise voltage. In a typical microprocessor circuit, total signal line area can easily be more than 100 times the size of the area of a bond pad. Thus, the unwanted capacitive effect of a signal line can be substantial. The noise voltage will be propagated through the distributed R-C network 17 the substrate and will then be coupled into nearby transistors or junctions. Performance of the transistors or junctions may be adversely affected as a result. In the illustrated example, transistor 16 may be sufficiently close to signal line 12 to be affected by capacitive coupling.
Referring now to a representative clock signal distribution network within a monolithic circuit depicted in FIG. 2, a clock oscillator 21 acts as the primary signal source point, which branches via multiple conductive signal lines 22, to various primary destination points within the circuit. Such primary destination points, which usually incorporate a line driver, may, in turn, function as secondary signal source points, each branching via additional signal lines 22 to secondary destination points within the circuit. The branching process may continue even further. Source points (without regard to whether they are primary or secondary) are designated by the letter "S", while destination points (without regard to whether they are primary or secondary) are designated by the letter "D".
One method of ameliorating the problem of high-frequency-induced noise in the substrate is to simply ground the substrate. This cannot be a solution, however, when as is commonly the case, a particular design requires that the substrate be held at a negative potential.
Another method of dealing with the problem of substrate noise is to use distance to attenuate the noise by locating sensitive circuitry far enough away from the lines carrying AC signals that the noise is eliminated or at leaded reduced to tolerable levels at the sensitive location. However, this approach is incompatible with the ongoing trends of circuit miniaturization and ever-faster clock speeds. An area-efficient AC transmission line structure that decouples noise from the substrate is needed.